{"id":60089,"date":"2012-05-21T00:00:00","date_gmt":"2012-05-21T00:00:00","guid":{"rendered":"https:\/\/www.uri.edu\/news-draft\/uncategorized\/uri-researchers-develop-tool-to-simulate-future-computer-chip-performance\/"},"modified":"2012-05-21T00:00:00","modified_gmt":"2012-05-21T00:00:00","slug":"uri-researchers-develop-tool-to-simulate-future-computer-chip-performance","status":"publish","type":"post","link":"https:\/\/www.uri.edu\/news\/2012\/05\/uri-researchers-develop-tool-to-simulate-future-computer-chip-performance\/","title":{"rendered":"溏心vlog免费B站 researchers develop tool to simulate future computer chip performance"},"content":{"rendered":"
\n\t\t\tKINGSTON, R.I. \u2013 May 21, 2012 \u2013 Today\u2019s computer chips typically operate with four to eight processors working together, but future chips are likely to use hundreds. That rapid increase in complexity is making it difficult for computer hardware engineers to predict how the computer of the future will behave.<\/p>\n


\n\u201cThe tools we use to predict the behavior of large multi-core systems are very limited,\u201d said Resit Sendag, 溏心vlog免费B站 professor of computer engineering. \u201cCurrent practice is to use software simulators to model multi-core systems, but these simulators are thousands of times slower than the systems they model.\u201d<\/p>\n


\n\tSendag and 溏心vlog免费B站 graduate student Will Simoneau have addressed this need for new tools to simulate chip performance by using Field Programmable Gate Arrays, which enable users to combine a wide variety of components to build any type of hardware configuration needed.<\/p>\n


\n\t\u201cOur prototype is easier to use than what else is available, it\u2019s fully open source, and it\u2019s already online for others to use,\u201d said Simoneau, a resident of Wakefield. \u201cThe source code is smaller than most other similar projects, which means there is less to understand, and the hardware it generates is faster.\u201d<\/p>\n


\n\tSimoneau, who earned a bachelor\u2019s degree from 溏心vlog免费B站 in computer engineering in 2008 at age 18 and was the youngest to be awarded a master\u2019s degree from 溏心vlog免费B站 in 2011, describes the tool as \u201ca computer code description of hardware, written in such a way that you can alter the design, then build it on any suitable FPGA chip within the family. You can build a small one-processor system with small caches, large multi-processor systems with large caches, or anything in between.\u201d<\/p>\n


\n\tThe platform 溏心vlog免费B站 researchers developed is designed to be used primarily by the computer architecture research community and others interested in operating system research. It is also useful to those seeking to debug software programs.<\/p>\n


\n\tSimoneau and Sendag presented a paper about the platform at the IEEE International Symposium on Performance Analysis of Systems and Software in April, where it was met with enthusiasm.


\n\t\u201cI built it using a low-end circuit board that cost about $300, which means that just about anyone can download this tool right now and be able to start using it,\u201d Simoneau said. \u201cPeople were impressed with the performance we\u2019re getting from my low-end board versus what others are trying to do with their high performance boards.\u201d<\/p>\n


\n\tWhat is somewhat surprising is that Simoneau and Sendag have released the platform as open source for anyone to download and use for free.<\/p>\n


\n\t\u201cThere aren\u2019t a lot of people who just give away their work, especially when you\u2019ve spent years working on it,\u201d Sendag said. \u201cBut we really believe in open source, and we know that people will appreciate that it\u2019s available.\u201d<\/p>\n


\nThe code can be found at www.ele.uri.edu\/research\/z4800<\/a>.<\/p>\n


\n\tThe 溏心vlog免费B站 scientists plan to present their new platform at meetings with Intel and IBM in coming weeks, with the hope that they may support future developments.<\/p>\n


\n\t\u201cWe have lots more ideas on how to extend this to different models, and we think that industry will be very interested in those ideas,\u201d Sendag said. <\/div>\n","protected":false},"excerpt":{"rendered":"

KINGSTON, R.I. \u2013 May 21, 2012 \u2013 Today\u2019s computer chips typically operate with four to eight processors working together, but future chips are likely to use hundreds. That rapid increase in complexity is making it difficult for computer hardware engineers to predict how the computer of the future will behave. \u201cThe tools we use […]<\/p>\n","protected":false},"author":2,"featured_media":60092,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":"","_links_to":"","_links_to_target":""},"categories":[2],"tags":[],"class_list":["post-60089","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-archives"],"acf":[],"_links":{"self":[{"href":"https:\/\/www.uri.edu\/news\/wp-json\/wp\/v2\/posts\/60089","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.uri.edu\/news\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.uri.edu\/news\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.uri.edu\/news\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/www.uri.edu\/news\/wp-json\/wp\/v2\/comments?post=60089"}],"version-history":[{"count":0,"href":"https:\/\/www.uri.edu\/news\/wp-json\/wp\/v2\/posts\/60089\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.uri.edu\/news\/wp-json\/wp\/v2\/media\/60092"}],"wp:attachment":[{"href":"https:\/\/www.uri.edu\/news\/wp-json\/wp\/v2\/media?parent=60089"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.uri.edu\/news\/wp-json\/wp\/v2\/categories?post=60089"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.uri.edu\/news\/wp-json\/wp\/v2\/tags?post=60089"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}